LDPC codes – design and accelerating simulations

Education

On Friday, 24 June 2016 at 3.00 pm in room 310 of LIT a seminar LDPC codes – design and accelerating simulations” will be held.

Speaker: Jan Broulim (University of West Bohemia and Czech Technical University, Czech Republic)

Abstract

Since Shannon’s work from 1948, the topic of error detection and error correction codes, related to channel coding, has seen significant growth. The first serious discussion of error correction codes emerged in Hamming’s work in 1950. Today, Low Density Parity Check (LDPC) codes have become very popular because of their general definition and excellent error correcting performance. The design of error correcting codes is a computationally intensive task because of billions operations needed for code evaluation. The presentation will be focused on the optimization of LDPC codes by genetic algorithms and on the discussion of the acceleration of the Belief Propagation (BP) decoder with the use of GPUs. Accelerated simulations based on OpenCL and CUDA were performed on HybriLIT infrastructure. The speed up ratio as compared to CPU simulations will be presented.

hybrilit.jinr.ru